1. FIELD OF THE INVENTION
The present invention relates to high performances CMOS operational power amplifiers.
More generally, the present invention relates to monolithically integrated, semiconductor amplifiers and more in particular, to amplifiers integrated in complementary MOS (briefly CMOS) devices; i.e. in monolithic devices made on a single chip of semiconductor material, typically silicon, and wherein the active circuit elements (transistors, etc.) are generally of the unipolar, superficial field effect, n-channel and p-channel type; although it is possible to form on the same chip or semiconducting substrate also junction type bipolaractive elements for satisfying particular circuit requirements. Moreover, the invention is particularly useful for making analog subsystems in digital type integrated circuits, i.e. for implementing analog functions in integrated devices of the digital kind.
2. DESCRIPTION OF THE PRIOR ART
Lately the necessity (or usefulness of implementing analog and digital subsystems in the same monolithically integrated circuit, using the same fabrication technology, has become evermore frequent. For this reason, implementation of analog functions in the so-called MOS technology (Metal-Oxide-Semiconductor) assumes an ever greater importance and in particular the development of operational amplifiers made with surface field effect active elements has had a big increment.
The operational amplifier is in fact the key element, a real building block, of a great majority of analog systems; and its characteristics determine decisively the characteristics of the whole system.
Generally, within an analog-digital system the operational amplifiers are very simple because they must drive a load very well defined during design and very often purely capacitive with values of few picofarads. Therefore such "internal" operational amplifiers are easily optimized in their characteristics just for this particular function. On the other hand, such systems must necessarily "communicate" with the world outside the integrated circuit; and therefore they need an interface ensure a correct operation under different load conditions (outside the integrated circuit), the external load easily reaching up to several hundreds of picofarads and/or down to a minimum of about 1 Kohm.
For delivering analog type signals out from the I.C., an operational power amplifier is very often used.
The word "power" is herein utilized for signifying that the operational amplifier is capable of driving differentiated and heavy loads in respect to those normally driven within the integrated circuit itself.
A large variety of self-standing, multipurpose, integrated operational amplifiers are available, on the other hand, and are usable for various applications by following strictly the advice and suggestions indicated in the relative data sheets of these devices. These integrated, multipurpose operational amplifiers show generally excellent performances with the exception of the input currents levels, which are rather high, coinciding with the base currents of the bipolar transistors usually utilized in the input stage of the amplifier. Considering that in many applications, especially those wherein a high precision is required or more precisely, where extremely low input or biasing currents are required; for this reason, most of the I.C. producers have developed mixed technologies for integrating on the same silicon chip junction type field effect transistors (JFET) together with bipolar type junction transistors (BJT), thereby necessarily increasing the complexity of the fabrication processes as well as the number of masks necessary for making the integrated device.
Also, for reasons of somewhat different nature in respect to the problems strictly connected with the so-called output buffers of complex integrated systems, the development of new types of operational amplifiers using exclusively MOS type transistors has had a great impulse. MOS transistors, i.e. superficial field effect transistors, have the great advantage of truly negligible input currents.
It may be affirmed that there is a great need and request for operational power amplifiers having high performances and precision characteristics, made entirely with CMOS technology, for the most generalized applications, i.e. both as interface operational power amplifiers (output buffers) in analog-digital integrated systems as well as multipurpose, integrated operational amplifiers.
Typically, the block diagram of an operational power amplifier shows a differential input stage, a gain stage and an output stage. The dynamic characteristics (transient response, bandwidth, settling time) are determined exclusively by the first two stages, therefore the output stage must have a wide bandwidth and must not introduce an appreciable phase shift at the open loop cut-off frequency, determined by the first two stages, in order not to degrade the dynamic performances of the whole operational amplifier.
Other requirements of the output stage are a low output impedance (much smaller than that of the load), a large maximum swing of the output signal, i.e. a high peak value of the output voltage before clipping begins to take place, and the ability to deliver a high current to the load with relatively low total harmonic distortion, i.e. with high linearity.
There exists vast literature on the making of the first two stages as well as the output stage of operational amplifiers using exclusively MOS devices, e.g. "MOS Operational Amplifier Design--A Tutorial Overview", IEEE Solid State Circuits, Vol. SC--17, No. 6, December 1982; as well as the data books of I.C. manufacturers.
All CMOS operational power amplifiers described in literature are single-ended.
Frequently, the output stage used is the source-follower, that is, a stage formed by two p-channel or n-channel MOS transistors in common drain configuration, which provides a voltage gain lower than unity and a large current gain.
An output stage of this type is characterized by an extremely wide band and introduces a negligible phase shift at the open loop cut-off frequency. On the other hand it presents some important drawbacks; namely:
(a) the voltage swing on the load, positive in the case of a source-follower stage made with n-channel devices or negative in the case of a source-follower stage made with p-channel devices, is limited by the sum of the intrinsic characteristics of the two integrated MOS transistors, i.e. by the value of their cut-in threshold voltage, by the body-effect and by the overdriving;
(b) a limited ability of taking up current from the relative current generator.
With the aim of overcoming the first drawback, it has been proposed to use an emitter-follower output stage utilizing a junction type bipolar transistor in place of the MOS transistor, i.e. purposely forming a bipolar, junction type transistor on the CMOS chip, which is an already consolidated technique not requiring additional masks beside those normally used by the CMOS process.
However, this solution has drawbacks too; namely:
(i) a persistent limited capability of taking up current from the current generator;
(ii) the risk of degrading the gain of the preceding stage (operational amplifier) if the gain of the bipolar transistor is not very high, because the impedance seen from the base of such a bipolar transistor equals approximately the product between its .beta. and the resistance of the external load, and the possibility of encountering stability problems due to the low and hardly controllable cut-off frequency of such an integrated bipolar transistor;
(iii) possibility of establishing a parasitic SCR (Latch-up) caused by the collector current flowing through the substrate of the integrated circuit.
Another widely used solution is the class-AB output stage. The characteristics of this stage are practically very similar to those of the simple source-follower stage, though not presenting limitations on the capability of taking up or delivering current, respectively, from or to the load. Nevertheless this output stage has the drawbacks of an output impedance that is relatively high with respect to the load and that has a maximum swing of the output signal limited toward both supply rails.
An operational power amplifier, entirely made in CMOS technology and which does not show any of the above noted drawbacks, is described in literature ("Large Swing CMOS Power Amplifier" IEEE Journal of Solid State Circuits, Vol. SC--18, No. 6, December 1985). However, such an amplifier has a rather narrow bandwidth (.congruent.500 Khz) and a rather long settling time (.congruent.5 micro sec). Moreover, in this case also, the amplifier is a single-ended output amplifier.
In particular applications, at the output of integrated analog subsystems as well as in multipurpose, operational power amplifiers, it is necessary to drive a certain load in a balanced way. In these cases, generally, the solution adopted consists of sending the signal directly to the input of a single-ended operational amplifier, e.g. one of the above mentioned known types, and in sending the same signal, inverted, (i.e. the negative of the signal) to the input of another single-ended operational amplifier, identical to the first one. For inverting the signal, i.e. for obtaining the negative thereof, it is necessary to utilize a further operational amplifier, which must be theoretically ideal insofar as it must not modify any other characteristic of the input signal (e.g. it must not introduce an appreciable amplitude or phase distortion on the spectrum components of the input signal). A block diagram of such a system is shown in FIG. 1.
Such a solution is not free of drawbacks which are essentially attributable to the asymmetry of the circuit.